------------------------------------------------------------------------------------------
--
-- File: x4xx_ps_rfdc_bd.vhd
-- Author: niBlockDesign::niBdExportStub
-- Original Project: HwBuildTools
-- Date: 27 September 2021
--
------------------------------------------------------------------------------------------
-- (c) Copyright National Instruments Corporation
-- All Rights Reserved
-- National Instruments Internal Information
------------------------------------------------------------------------------------------
--
-- Purpose: This is an automatically generated stub file to match the entity
-- declaration for 'x4xx_ps_rfdc_bd'. This file was created using niBdExportStub
-- Do not modify this file directly!
--
------------------------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
library unisim;
use unisim.vcomponents.all;

entity x4xx_ps_rfdc_bd is
port (
    adc_data_out_resetn_dclk : out STD_LOGIC;
    adc_enable_data_rclk : out STD_LOGIC;
    adc_reset_pulse_dclk : in STD_LOGIC;
    adc_rfdc_axi_resetn_rclk : out STD_LOGIC;
    bus_clk : in STD_LOGIC;
    bus_rstn : in STD_LOGIC;
    clk40 : in STD_LOGIC;
    clk40_rstn : in STD_LOGIC;
    dac_data_in_resetn_dclk : out STD_LOGIC;
    dac_data_in_resetn_dclk2x : out STD_LOGIC;
    dac_data_in_resetn_rclk : out STD_LOGIC;
    dac_data_in_resetn_rclk2x : out STD_LOGIC;
    dac_reset_pulse_dclk : in STD_LOGIC;
    data_clk : out STD_LOGIC;
    data_clk_2x : out STD_LOGIC;
    data_clock_locked : out STD_LOGIC;
    enable_gated_clocks_clk40 : in STD_LOGIC;
    enable_sysref_rclk : in STD_LOGIC;
    fir_resetn_rclk2x : out STD_LOGIC;
    gated_base_clks_valid_clk40 : out STD_LOGIC;
    invert_adc_iq_rclk2 : out STD_LOGIC_VECTOR ( 7 downto 0 );
    invert_dac_iq_rclk2 : out STD_LOGIC_VECTOR ( 7 downto 0 );
    irq0_lpd_rpu_n : in STD_LOGIC;
    irq1_lpd_rpu_n : in STD_LOGIC;
    jtag0_tck : inout STD_LOGIC;
    jtag0_tdi : inout STD_LOGIC;
    jtag0_tdo : in STD_LOGIC;
    jtag0_tms : inout STD_LOGIC;
    nco_reset_done_dclk : out STD_LOGIC;
    pl_clk40 : out STD_LOGIC;
    pl_clk100 : out STD_LOGIC;
    pl_clk166 : out STD_LOGIC;
    pl_clk200 : out STD_LOGIC;
    pl_ps_irq0 : in STD_LOGIC_VECTOR ( 7 downto 0 );
    pl_ps_irq1 : in STD_LOGIC_VECTOR ( 5 downto 0 );
    pl_resetn0 : out STD_LOGIC;
    pl_resetn1 : out STD_LOGIC;
    pl_resetn2 : out STD_LOGIC;
    pl_resetn3 : out STD_LOGIC;
    pll_ref_clk_in : in STD_LOGIC;
    pll_ref_clk_out : out STD_LOGIC;
    rf_axi_status_clk40 : in STD_LOGIC_VECTOR ( 31 downto 0 );
    rf_dsp_info_clk40 : in STD_LOGIC_VECTOR ( 31 downto 0 );
    rfdc_clk : out STD_LOGIC_VECTOR ( 0 to 0 );
    rfdc_clk_2x : out STD_LOGIC_VECTOR ( 0 to 0 );
    rfdc_irq : out STD_LOGIC;
    s_axi_hp0_aclk : in STD_LOGIC;
    s_axi_hp1_aclk : in STD_LOGIC;
    s_axi_hpc0_aclk : in STD_LOGIC;
    start_nco_reset_dclk : in STD_LOGIC;
    sysref_out_pclk : out STD_LOGIC;
    sysref_out_rclk : out STD_LOGIC;
    sysref_pl_in : in STD_LOGIC;
    s_axi_hp0_aruser : in STD_LOGIC;
    s_axi_hp0_awuser : in STD_LOGIC;
    s_axi_hp0_awid : in STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hp0_awaddr : in STD_LOGIC_VECTOR ( 48 downto 0 );
    s_axi_hp0_awlen : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axi_hp0_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hp0_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hp0_awlock : in STD_LOGIC;
    s_axi_hp0_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hp0_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hp0_awvalid : in STD_LOGIC;
    s_axi_hp0_awready : out STD_LOGIC;
    s_axi_hp0_wdata : in STD_LOGIC_VECTOR ( 127 downto 0 );
    s_axi_hp0_wstrb : in STD_LOGIC_VECTOR ( 15 downto 0 );
    s_axi_hp0_wlast : in STD_LOGIC;
    s_axi_hp0_wvalid : in STD_LOGIC;
    s_axi_hp0_wready : out STD_LOGIC;
    s_axi_hp0_bid : out STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hp0_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hp0_bvalid : out STD_LOGIC;
    s_axi_hp0_bready : in STD_LOGIC;
    s_axi_hp0_arid : in STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hp0_araddr : in STD_LOGIC_VECTOR ( 48 downto 0 );
    s_axi_hp0_arlen : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axi_hp0_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hp0_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hp0_arlock : in STD_LOGIC;
    s_axi_hp0_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hp0_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hp0_arvalid : in STD_LOGIC;
    s_axi_hp0_arready : out STD_LOGIC;
    s_axi_hp0_rid : out STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hp0_rdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    s_axi_hp0_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hp0_rlast : out STD_LOGIC;
    s_axi_hp0_rvalid : out STD_LOGIC;
    s_axi_hp0_rready : in STD_LOGIC;
    s_axi_hp0_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hp0_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axis_eth_dma_tdata : in STD_LOGIC_VECTOR ( 63 downto 0 );
    s_axis_eth_dma_tkeep : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axis_eth_dma_tlast : in STD_LOGIC;
    s_axis_eth_dma_tready : out STD_LOGIC;
    s_axis_eth_dma_tvalid : in STD_LOGIC;
    s_axi_hp1_aruser : in STD_LOGIC;
    s_axi_hp1_awuser : in STD_LOGIC;
    s_axi_hp1_awid : in STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hp1_awaddr : in STD_LOGIC_VECTOR ( 48 downto 0 );
    s_axi_hp1_awlen : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axi_hp1_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hp1_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hp1_awlock : in STD_LOGIC;
    s_axi_hp1_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hp1_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hp1_awvalid : in STD_LOGIC;
    s_axi_hp1_awready : out STD_LOGIC;
    s_axi_hp1_wdata : in STD_LOGIC_VECTOR ( 127 downto 0 );
    s_axi_hp1_wstrb : in STD_LOGIC_VECTOR ( 15 downto 0 );
    s_axi_hp1_wlast : in STD_LOGIC;
    s_axi_hp1_wvalid : in STD_LOGIC;
    s_axi_hp1_wready : out STD_LOGIC;
    s_axi_hp1_bid : out STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hp1_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hp1_bvalid : out STD_LOGIC;
    s_axi_hp1_bready : in STD_LOGIC;
    s_axi_hp1_arid : in STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hp1_araddr : in STD_LOGIC_VECTOR ( 48 downto 0 );
    s_axi_hp1_arlen : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axi_hp1_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hp1_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hp1_arlock : in STD_LOGIC;
    s_axi_hp1_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hp1_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hp1_arvalid : in STD_LOGIC;
    s_axi_hp1_arready : out STD_LOGIC;
    s_axi_hp1_rid : out STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hp1_rdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    s_axi_hp1_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hp1_rlast : out STD_LOGIC;
    s_axi_hp1_rvalid : out STD_LOGIC;
    s_axi_hp1_rready : in STD_LOGIC;
    s_axi_hp1_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hp1_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hpc0_aruser : in STD_LOGIC;
    s_axi_hpc0_awuser : in STD_LOGIC;
    s_axi_hpc0_awid : in STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hpc0_awaddr : in STD_LOGIC_VECTOR ( 48 downto 0 );
    s_axi_hpc0_awlen : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axi_hpc0_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hpc0_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hpc0_awlock : in STD_LOGIC;
    s_axi_hpc0_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hpc0_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hpc0_awvalid : in STD_LOGIC;
    s_axi_hpc0_awready : out STD_LOGIC;
    s_axi_hpc0_wdata : in STD_LOGIC_VECTOR ( 127 downto 0 );
    s_axi_hpc0_wstrb : in STD_LOGIC_VECTOR ( 15 downto 0 );
    s_axi_hpc0_wlast : in STD_LOGIC;
    s_axi_hpc0_wvalid : in STD_LOGIC;
    s_axi_hpc0_wready : out STD_LOGIC;
    s_axi_hpc0_bid : out STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hpc0_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hpc0_bvalid : out STD_LOGIC;
    s_axi_hpc0_bready : in STD_LOGIC;
    s_axi_hpc0_arid : in STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hpc0_araddr : in STD_LOGIC_VECTOR ( 48 downto 0 );
    s_axi_hpc0_arlen : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axi_hpc0_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hpc0_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hpc0_arlock : in STD_LOGIC;
    s_axi_hpc0_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hpc0_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hpc0_arvalid : in STD_LOGIC;
    s_axi_hpc0_arready : out STD_LOGIC;
    s_axi_hpc0_rid : out STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hpc0_rdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    s_axi_hpc0_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hpc0_rlast : out STD_LOGIC;
    s_axi_hpc0_rvalid : out STD_LOGIC;
    s_axi_hpc0_rready : in STD_LOGIC;
    s_axi_hpc0_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hpc0_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
    adc0_clk_clk_n : in STD_LOGIC;
    adc0_clk_clk_p : in STD_LOGIC;
    adc2_clk_clk_n : in STD_LOGIC;
    adc2_clk_clk_p : in STD_LOGIC;
    m_axi_app_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_app_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_app_awvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_app_awready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_app_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_app_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
    m_axi_app_wvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_app_wready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_app_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_app_bvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_app_bready : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_app_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_app_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_app_arvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_app_arready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_app_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_app_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_app_rvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_app_rready : out STD_LOGIC_VECTOR ( 0 to 0 );
    dac0_clk_clk_n : in STD_LOGIC;
    dac0_clk_clk_p : in STD_LOGIC;
    dac1_clk_clk_n : in STD_LOGIC;
    dac1_clk_clk_p : in STD_LOGIC;
    gpio_0_tri_i : in STD_LOGIC_VECTOR ( 63 downto 0 );
    gpio_0_tri_o : out STD_LOGIC_VECTOR ( 63 downto 0 );
    gpio_0_tri_t : out STD_LOGIC_VECTOR ( 63 downto 0 );
    m_axi_eth_internal_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_eth_internal_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_eth_internal_awvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_eth_internal_awready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_eth_internal_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_eth_internal_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
    m_axi_eth_internal_wvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_eth_internal_wready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_eth_internal_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_eth_internal_bvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_eth_internal_bready : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_eth_internal_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_eth_internal_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_eth_internal_arvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_eth_internal_arready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_eth_internal_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_eth_internal_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_eth_internal_rvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_eth_internal_rready : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axis_eth_dma_tdata : out STD_LOGIC_VECTOR ( 63 downto 0 );
    m_axis_eth_dma_tkeep : out STD_LOGIC_VECTOR ( 7 downto 0 );
    m_axis_eth_dma_tlast : out STD_LOGIC;
    m_axis_eth_dma_tready : in STD_LOGIC;
    m_axis_eth_dma_tvalid : out STD_LOGIC;
    m_axi_rpu_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_rpu_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_rpu_awvalid : out STD_LOGIC;
    m_axi_rpu_awready : in STD_LOGIC;
    m_axi_rpu_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_rpu_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
    m_axi_rpu_wvalid : out STD_LOGIC;
    m_axi_rpu_wready : in STD_LOGIC;
    m_axi_rpu_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_rpu_bvalid : in STD_LOGIC;
    m_axi_rpu_bready : out STD_LOGIC;
    m_axi_rpu_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_rpu_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_rpu_arvalid : out STD_LOGIC;
    m_axi_rpu_arready : in STD_LOGIC;
    m_axi_rpu_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_rpu_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_rpu_rvalid : in STD_LOGIC;
    m_axi_rpu_rready : out STD_LOGIC;
    m_axi_core_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_core_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_core_awvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_core_awready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_core_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_core_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
    m_axi_core_wvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_core_wready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_core_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_core_bvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_core_bready : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_core_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_core_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_core_arvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_core_arready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_core_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_core_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_core_rvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_core_rready : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_awaddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_mpm_ep_awprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_mpm_ep_awvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_awready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_wdata : out STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_mpm_ep_wstrb : out STD_LOGIC_VECTOR ( 3 downto 0 );
    m_axi_mpm_ep_wvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_wready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_bresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_mpm_ep_bvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_bready : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_araddr : out STD_LOGIC_VECTOR ( 39 downto 0 );
    m_axi_mpm_ep_arprot : out STD_LOGIC_VECTOR ( 2 downto 0 );
    m_axi_mpm_ep_arvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_arready : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_rdata : in STD_LOGIC_VECTOR ( 31 downto 0 );
    m_axi_mpm_ep_rresp : in STD_LOGIC_VECTOR ( 1 downto 0 );
    m_axi_mpm_ep_rvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    m_axi_mpm_ep_rready : out STD_LOGIC_VECTOR ( 0 to 0 );
    adc_tile224_ch0_dout_i_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    adc_tile224_ch0_dout_i_tready : in STD_LOGIC;
    adc_tile224_ch0_dout_i_tvalid : out STD_LOGIC;
    adc_tile224_ch0_dout_q_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    adc_tile224_ch0_dout_q_tready : in STD_LOGIC;
    adc_tile224_ch0_dout_q_tvalid : out STD_LOGIC;
    adc_tile224_ch1_dout_i_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    adc_tile224_ch1_dout_i_tready : in STD_LOGIC;
    adc_tile224_ch1_dout_i_tvalid : out STD_LOGIC;
    adc_tile224_ch1_dout_q_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    adc_tile224_ch1_dout_q_tready : in STD_LOGIC;
    adc_tile224_ch1_dout_q_tvalid : out STD_LOGIC;
    adc_tile226_ch0_dout_i_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    adc_tile226_ch0_dout_i_tready : in STD_LOGIC;
    adc_tile226_ch0_dout_i_tvalid : out STD_LOGIC;
    adc_tile226_ch0_dout_q_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    adc_tile226_ch0_dout_q_tready : in STD_LOGIC;
    adc_tile226_ch0_dout_q_tvalid : out STD_LOGIC;
    adc_tile226_ch1_dout_i_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    adc_tile226_ch1_dout_i_tready : in STD_LOGIC;
    adc_tile226_ch1_dout_i_tvalid : out STD_LOGIC;
    adc_tile226_ch1_dout_q_tdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    adc_tile226_ch1_dout_q_tready : in STD_LOGIC;
    adc_tile226_ch1_dout_q_tvalid : out STD_LOGIC;
    dac_tile228_ch0_vout_v_n : out STD_LOGIC;
    dac_tile228_ch0_vout_v_p : out STD_LOGIC;
    dac_tile228_ch1_vout_v_n : out STD_LOGIC;
    dac_tile228_ch1_vout_v_p : out STD_LOGIC;
    dac_tile229_ch0_vout_v_n : out STD_LOGIC;
    dac_tile229_ch0_vout_v_p : out STD_LOGIC;
    dac_tile229_ch1_vout_v_n : out STD_LOGIC;
    dac_tile229_ch1_vout_v_p : out STD_LOGIC;
    dac_tile228_ch0_din_tdata : in STD_LOGIC_VECTOR ( 255 downto 0 );
    dac_tile228_ch0_din_tvalid : in STD_LOGIC;
    dac_tile228_ch0_din_tready : out STD_LOGIC;
    dac_tile228_ch1_din_tdata : in STD_LOGIC_VECTOR ( 255 downto 0 );
    dac_tile228_ch1_din_tvalid : in STD_LOGIC;
    dac_tile228_ch1_din_tready : out STD_LOGIC;
    dac_tile229_ch0_din_tdata : in STD_LOGIC_VECTOR ( 255 downto 0 );
    dac_tile229_ch0_din_tvalid : in STD_LOGIC;
    dac_tile229_ch0_din_tready : out STD_LOGIC;
    dac_tile229_ch1_din_tdata : in STD_LOGIC_VECTOR ( 255 downto 0 );
    dac_tile229_ch1_din_tvalid : in STD_LOGIC;
    dac_tile229_ch1_din_tready : out STD_LOGIC;
    s_axi_hpc1_awid : in STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hpc1_awaddr : in STD_LOGIC_VECTOR ( 48 downto 0 );
    s_axi_hpc1_awlen : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axi_hpc1_awsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hpc1_awburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hpc1_awlock : in STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_awcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hpc1_awprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hpc1_awqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hpc1_awvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_awready : out STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_wdata : in STD_LOGIC_VECTOR ( 127 downto 0 );
    s_axi_hpc1_wstrb : in STD_LOGIC_VECTOR ( 15 downto 0 );
    s_axi_hpc1_wlast : in STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_wvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_wready : out STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_bid : out STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hpc1_bresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hpc1_bvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_bready : in STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_arid : in STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hpc1_araddr : in STD_LOGIC_VECTOR ( 48 downto 0 );
    s_axi_hpc1_arlen : in STD_LOGIC_VECTOR ( 7 downto 0 );
    s_axi_hpc1_arsize : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hpc1_arburst : in STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hpc1_arlock : in STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_arcache : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hpc1_arprot : in STD_LOGIC_VECTOR ( 2 downto 0 );
    s_axi_hpc1_arqos : in STD_LOGIC_VECTOR ( 3 downto 0 );
    s_axi_hpc1_arvalid : in STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_arready : out STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_rid : out STD_LOGIC_VECTOR ( 5 downto 0 );
    s_axi_hpc1_rdata : out STD_LOGIC_VECTOR ( 127 downto 0 );
    s_axi_hpc1_rresp : out STD_LOGIC_VECTOR ( 1 downto 0 );
    s_axi_hpc1_rlast : out STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_rvalid : out STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_rready : in STD_LOGIC_VECTOR ( 0 to 0 );
    sysref_rf_in_diff_n : in STD_LOGIC;
    sysref_rf_in_diff_p : in STD_LOGIC;
    adc_tile224_ch0_vin_v_n : in STD_LOGIC;
    adc_tile224_ch0_vin_v_p : in STD_LOGIC;
    adc_tile224_ch1_vin_v_n : in STD_LOGIC;
    adc_tile224_ch1_vin_v_p : in STD_LOGIC;
    adc_tile226_ch0_vin_v_n : in STD_LOGIC;
    adc_tile226_ch0_vin_v_p : in STD_LOGIC;
    adc_tile226_ch1_vin_v_n : in STD_LOGIC;
    adc_tile226_ch1_vin_v_p : in STD_LOGIC;
    s_axi_hpc1_aruser : in STD_LOGIC_VECTOR ( 0 to 0 );
    s_axi_hpc1_awuser : in STD_LOGIC_VECTOR ( 0 to 0 )
  );
  end entity x4xx_ps_rfdc_bd;

architecture stub of x4xx_ps_rfdc_bd is
begin
end architecture stub;
