schema: rfnoc_modtool_args
module_name: null_src_sink
version: "1.0"
rfnoc_version: "1.0"
chdr_width: 64
noc_id: 0x1
# Provide a custom path to Makefile.srcs for this block relative to the
# FPGA repository
makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_null_src_sink/Makefile.srcs"

parameters:
  NIPC: CHDR_W/32
  ITEM_W: 32

clocks:
  - name: rfnoc_chdr
    freq: "[]"
  - name: rfnoc_ctrl
    freq: "[]"

control:
  fpga_iface: ctrlport
  interface_direction: slave
  fifo_depth: 32
  clk_domain: rfnoc_chdr
  ctrlport:
    byte_mode: False
    timed: False
    has_status: False

data:
  fpga_iface: axis_pyld_ctxt
  clk_domain: rfnoc_chdr
  inputs:
    sink:
      item_width: 32
      nipc: 2
      context_fifo_depth: 2
      payload_fifo_depth: 2
      format: sc16
      mdata_sig: ~
    loop:
      item_width: 32
      nipc: 2
      context_fifo_depth: 2
      payload_fifo_depth: 2
      format: sc16
      mdata_sig: ~
  outputs:
    source:
      item_width: 32
      nipc: 2
      context_fifo_depth: 2
      payload_fifo_depth: 2
      format: sc16
      mdata_sig: ~
    loop:
      item_width: 32
      nipc: 2
      context_fifo_depth: 2
      payload_fifo_depth: 2
      format: sc16
      mdata_sig: ~

io_port:

registers:

properties:
